390
Former Intel CPU engineer details how internal x86-64 efforts were suppressed prior to AMD64's success
(www.tomshardware.com)
this post was submitted on 19 Oct 2024
390 points (99.0% liked)
Technology
59428 readers
3646 users here now
This is a most excellent place for technology news and articles.
Our Rules
- Follow the lemmy.world rules.
- Only tech related content.
- Be excellent to each another!
- Mod approved content bots can post up to 10 articles per day.
- Threads asking for personal tech support may be deleted.
- Politics threads may be removed.
- No memes allowed as posts, OK to post as comments.
- Only approved bots from the list below, to ask if your bot can be added please contact us.
- Check for duplicates before posting, duplicates may be removed
Approved Bots
founded 1 year ago
MODERATORS
you are viewing a single comment's thread
view the rest of the comments
view the rest of the comments
I never denied that, what I denied was the ridiculous idea that Address bus was a meaningful measure. AMD64 is a 64 bit instruction set by definition, but a modern Ryzen CPU is so much more than just AMD64. And the same is true for the competition.
Originally an AMD64 CPU was single core single threaded. This is far from true today, so obviously since the CPU can handle multiple instructions on multiple cores, the "CPU Package" is also necessarily wider.
I have no idea what has gone wrong here? I'm not denying that a modern Intel or AMD or Arm CPU generally is called a 64 bit CPU.
I'm just stating that if they had to be measured by their actual capabilities, a modern Ryzen CPU for instance, is actually closer to being a 256 bit CPU, and that's per core!. In part due to technologies that make them able to execute several instructions in a single clock cycle, that operate on way wider busses than older CPU's, that encoded only a single thread per core.
But there can be absolutely no doubt that Address bus was NEVER used to determine the bit width of a CPU, that would simply be ridiculous, as it ONLY determines addressable RAM and nothing else.
Those easy to understand examples were only to show how claiming address bus can be a meaningful measure for the bit width of a CPU is ridiculous.
Also the AMD64 is only part of the instruction set of a modern Ryzen CPU, so although AMD64 definitely is a 64 bit instruction set, it only describes one part of the CPU. It also supports: x87, MMX, SSE, SSE2, SSE3, SSSE3, SSE4. 1, SSE4. 2, AES, CLMUL, AVX, AVX2, FMA3, CVT16/F16C, ABM, BMI1, BMI2, SHA.
Many of which have way wider instructions than 64 bit, AVX2 for instance supports 512 bit math.
That seems to be exactly what you're arguing about, unless I have misread this entire thread.
If we want to highlight other capabilities, we should use different terminology than "X-bit" because that has been pretty much universally agreed upon to refer to instruction sizes and addresses, not data pipelines. And we do that, product spec sheets refer to extensions to point out the unique capabilities they offer (e.g. Intel was pretty famous for supporting AVX-512 almost 10 years before AMD).
That said, now that 32-bit is essentially dead, the "X-bit" marker is essentially dead, and saying something is 256-bit or whatever today is just going to confuse people. People have gotten into the habit if talking about specific capabilities if it's relevant (which it isn't for most people, who just care about "IPC").
That was kind of the point, it's ridiculous to think a modern CPU hasn't evolved dramatically since the introduction of mainstream 64 bit in 2003.
It's still called 64 bit, but there are so many developments.
Exactly, and that is achieved by a modern core operating at about 256 bit internally, to achieve faster execution.
I'm not arguing it's wrong to call it 64 bit, because there is no "true" bit width to call it. So we might as well still call it 64 bit, because it describes the core instruction set. (not just pointers as was claimed by someone else) My point was just that it doesn't really describe the dramatic development of the CPU as a whole, and even the individual cores are more complex in hardware, despite the main instruction set remains the same.